As the capacity of flash memory cards and drives increases, the scale of the memory cells within the memory array continues to decrease. Within a high density array, especially of the NAND variety, a charge stored in one cell or portion of the array may influence a read or program operation of a neighboring cell. This is what as known as a read or program disturb and cell coupling.
For further information on cell coupling, disturbs, and the operation and structure of NAND flash generally, please refer to U.S. patent application publication Nos.: US-2006-0233026-A1 entitled “Method for Non-Volatile Memory With Background Data Latch Caching During Program Operations”; US-2006-0233023-A1 entitled “Method for Non-Volatile Memory With Background Data Latch Caching During Erase Operations”; US-2006-0221696-A1, entitled “Method for Non-Volatile Memory With Background Data Latch Caching During Read Operations”; U.S. Pat. No. 6,870,768 entitled “Techniques for Reducing Effects of Coupling Between Storage Elements of Adjacent Rows of Memory Cells”; and US-2006-0140011-A1 entitled “Reducing Floating Gate to Floating Gate Coupling Effect” which are hereby incorporated by reference in the entirety for all purposes.
Flash memory is often used by some users to constantly store the same data pattern again and again repeatedly in some blocks of the flash memory. The result is that there will be some bits left to be erased but never programmed. Additionally, there will be also some bits always programmed and rarely erased. These persistent data patterns are problematic in that they may result in disturbs and other difficulties such as floating gate to floating gate effects, NAND string resistance effect, and reduced memory endurance and reliability, etc.
Solid-state memory capable of nonvolatile storage of charge, particularly in the form of EEPROM and flash EEPROM packaged as a small form factor card, has recently become the storage of choice in a variety of mobile and handheld devices, notably information appliances and consumer electronics products. Unlike RAM (random access memory) that is also solid-state memory, flash memory is non-volatile, retaining its stored data even after power is turned off. In spite of the higher cost, flash memory is increasingly being used in mass storage applications. Conventional mass storage, based on rotating magnetic medium such as hard drives and floppy disks, is unsuitable for the mobile and handheld environment. This is because disk drives tend to be bulky, are prone to mechanical failure and have high latency and high power requirements. These undesirable attributes make disk-based storage impractical in most mobile and portable applications. On the other hand, flash memory, both embedded and in the form of a removable card is ideally suited in the mobile and handheld environment because of its small size, low power consumption, high speed and high reliability features.
EEPROM and electrically programmable read-only memory (EPROM) are non-volatile memory that can be erased and have new data written or “programmed” into their memory cells. Both utilize a floating (unconnected) conductive gate, in a field effect transistor structure, positioned over a channel region in a semiconductor substrate, between source and drain regions. A control gate is then provided over the floating gate. The threshold voltage characteristic of the transistor is controlled by the amount of charge that is retained on the floating gate. That is, for a given level of charge on the floating gate, there is a corresponding voltage (threshold) that must be applied to the control gate before the transistor is turned “on” to permit conduction between its source and drain regions.
The floating gate can hold a range of charges and therefore can be programmed to any threshold voltage level within a threshold voltage window. The size of the threshold voltage window is delimited by the minimum and maximum threshold levels of the device, which in turn correspond to the range of the charges that can be programmed onto the floating gate. The threshold window generally depends on the memory device's characteristics, operating conditions and history. Each distinct, resolvable threshold voltage level range within the window may, in principle, be used to designate a definite memory state of the cell.
The transistor serving as a memory cell is typically programmed to a “programmed” state by one of two mechanisms. In “hot electron injection,” a high voltage applied to the drain accelerates electrons across the substrate channel region. At the same time a high voltage applied to the control gate pulls the hot electrons through a thin gate dielectric onto the floating gate. In “tunneling injection,” a high voltage is applied to the control gate relative to the substrate. In this way, electrons are pulled from the substrate to the intervening floating gate.
The memory device may be erased by a number of mechanisms. For EPROM, the memory is bulk erasable by removing the charge from the floating gate by ultraviolet radiation. For EEPROM, a memory cell is electrically erasable, by applying a high voltage to the substrate relative to the control gate so as to induce electrons in the floating gate to tunnel through a thin oxide to the substrate channel region (i.e., Fowler-Nordheim tunneling.) Typically, the EEPROM is erasable byte by byte. For flash EEPROM, the memory is electrically erasable either all at once or one or more blocks at a time, where a block may consist of 512 bytes or more of memory.